HyperForje

Prompt → verified RTL → routed GDSII. Agentic chip design on Amazon Bedrock AgentCore — 13 agents, deterministic Lambda gates, no LLM in the verdict path, running entirely in your own AWS account.
Python 3.12 · arm64Bedrock AgentCoreSky130HD PDK Autonomy L3~$0.67–2 / run (measured)Apache 2.0

What HyperForje doesTakes a plain-English hardware spec and runs the whole front-end flow as an AWS Step Functions state machine, with 13 Strands agents as async leaves. Every pass/fail decision is made by a pure-Python Lambda — never by a model.

"Design a 4-function calculator for 8-bit operands on Sky130HD"

Generates & verifies RTL

Synthesizable Verilog plus a self-checking testbench, then proves it with Verilator, SymbiYosys, Icarus, Yosys and OpenROAD.

Proves properties formally

A generated SymbiYosys/z3 harness runs between lint and simulation. A vacuous proof (zero assertions) is demoted to inconclusive, never reported as verified.

Streams out real GDSII

Routed DEF → GDSII via KLayout with a SHA-256 manifest. The gate checks header, checksum, hierarchy and PDK provenance — never accepts a DEF as a substitute.

Deterministic verdicts

Gate Lambdas parse tool exit codes and logs; no model output ever reaches a Choice state. Same input → same verdict, always.

Self-healing fix loop

On failure the supervisor reads the real tool log, extracts file:line guidance, and re-enters behind a schema check and an iverilog compile check. Bounded by the state machine.

Runs in your account

All compute, storage and inference stay in your AWS account. No design IP leaves the boundary. 13 idle AgentCore runtimes cost $0 — consumption-priced.

Honest scope. Output is engineer-reviewed draft silicon, not a foundry-accepted tape-out. Proven end-to-end RTL→GDSII on the SkyWater Sky130HD open PDK (130nm). DRC, LVS, antenna, extraction, power-grid and fill remain separate work. See the status page for the full feature-to-completion mapping.

Proof — measured, not modelledEvery figure below has run ids behind it in the repo benchmarks. Nothing here is projected.

3
designs proven RTL→GDSII
$0.67
cheapest clean calc4 run
7
deterministic gate verdicts / run
90%
calc4 success rate (9/10, POC)
DesignWhat it isSynth cellsMean wallMean costStatus
calc44-function calculator, 8-bit operands888~5.7 min$0.67Proven · POC
AES-128Encryption core, iterative 11-cycle9,71027.9 min$2.88Proven · DEV 0/2 POC
PicoRV32RV32IM CPU, unmodified upstream core8,39918.8 min$0.198Flow-proven · frozen pkg
Read PicoRV32 narrowly. It ran from a frozen reference package carrying the unmodified upstream core, which bypasses model-driven RTL generation — hence 13.9k mean tokens vs AES-128's 586k. It proves the flow carries a real CPU to accepted GDS; it does not prove generating a CPU from a prompt. AES-128 is the strongest result: verified against the FIPS-197 known-answer vectors, an oracle outside the model.

Cost anatomy — consistent across designs

→ Open the live evals dashboard for per-run cost, tokens, fix iterations, caching, and tape-out tier across every run on record.

Reference architectureStep Functions owns the entire DAG. A Lambda bridge accepts the task token and calls InvokeAgentRuntime, because SFN has no native AgentCore integration.

HyperForje reference architecture on AWS

Step Functions owns sequencing

Retry, catch, timeout and branching are native state-machine features — no LLM routing risk, and a run is inspectable in the console.

waitForTaskToken per agent

The agent returns ACCEPTED immediately, works on a background thread, heartbeats every 60s, and signals exactly once. No HTTP timeout ceiling.

One adapter contract

AdapterInput{design_name, file_paths, params}AdapterOutput{passed, metrics, log_path}. Every tool, one shape.

Explore the solutionEverything below is demo-ready and reads from the same account data.

13 agents · 7 gate verdictsOne arm64 container image; AGENT_ROLE selects behaviour at startup; 13 dedicated least-privilege roles. No role holds InvokeAgentRuntime — agents cannot call each other.

The agents

designGenerate RTL + testbench via Bedrock
testbenchGenerate or repair testbench code
verificationVerilator lint + SymbiYosys formal proof
simulateIcarus in-image, or PCS/Slurm
synthYosys synthesis
pnrOpenROAD place & route
signoffCompose the sign-off report from parsed gates
supervisordecide_fix — deterministic retry/escalate
registry / notifierDynamoDB run record; SES/SNS + artifact bundle
provision / cleanup / escalationRun dir; teardown (gated); exhaustion alert

The gate verdicts (7 on a normal run)

GateSpecFrozen-package root-of-trust + schema; passes a prompt-driven run as legacy_generated
GateLintVerilator error_count == 0
GateFormalBranches on SymbiYosys outcome, never the exit code; inconclusive = advisory
GateSimPass marker present; fail markers take priority
GateSynthexit 0 · no errors · 0 latches · cells > 0
GatePnRexit 0 · WNS ≥ 0 · no congestion overflow
GateGDSIIGDS + manifest; header, SHA-256, no empty cells; a DEF is never a fallback
Three post-GDS gates (GateSTA, GatePower, GatePhysical) run only when a frozen package's sign-off contract asks for them — selected by a frozen contract, never by an LLM.

Pluggable models & EDA toolsSwap per workload, per customer — zero agent code changes. Tool selection is the TOOL_REGISTRY env var (JSON).

Foundation LLMs

Claude Sonnet (default) · Nova · Nemotron · DeepSeek

EDA — open source

Verilator · Icarus · Yosys · OpenROAD · KLayout · SymbiYosys · z3

EDA — Synopsys

VCS · Fusion Compiler · DSO.ai

EDA — Cadence / Siemens

JasperGold · Innovus · Calibre · Cerebrus

Commercial and ISV tiers are contract-ready: the mock/http/batch adapter switch is real and labelled, but the production Gateway caller is roadmap work. See the status page's backlog for exactly what is wired vs declared.